Universal serial bus USB 3.0 compatible host with lower operation power consumption and method for reducing operation power consumption of a USB compatible 3.0 host
US9367121B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2012 |
| Grant date | Jun 14, 2016 |
| Priority date | — |
| Expiry date | Apr 22, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A USB 3.0 compatible host with low power consumption includes a super speed circuit, a non-super speed circuit, and a control module. The super speed circuit transmits data at a first transmission speed and the non-super speed circuit transmits data at a second transmission speed, a third transmission speed, or a fourth transmission speed wherein the first transmission speed is faster than the second transmission speed, the third transmission speed, and the fourth transmission speed. Further, the control module is coupled to the super speed circuit and the non-super speed circuit for determining to turn on or off the super speed circuit of the USB 3.0 compatible host, during the USB 3.0 compatible host being connected to a USB 3.0 compatible peripheral device, based on whether transmission data quantity between the USB 3.0 compatible host and the USB 3.0 compatible peripheral device is greater than a predetermined value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.