Patent · US Active

Processor instruction set for controlling an event source to generate events used to schedule threads

US9367321B2 · kind B2 · utility

4Cited by
5References
48Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMar 14, 2007
Grant dateJun 14, 2016
Priority date
Expiry dateMay 30, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/485
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The invention provides a processor comprising: an execution unit, and a thread scheduler configured to schedule a plurality of threads for execution by the execution unit in dependence on a respective runnable status for each thread. The execution unit is configured to execute thread scheduling instructions which manage the runnable statuses. The thread scheduling instructions including at least: one or more source event enable instructions each of which sets an event source to a mode in which it generates an event dependent on activity occurring at that source, and a wait instruction which sets one of said runnable statuses to suspended pending one of the events upon which continued execution of the respective thread depends. The continued execution comprises retrieval of a continuation point vector for the respective thread.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.