Patent · US Active

Semiconductor SRAM structures

US9368503B2 · kind B2 · utility

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9Claims

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Assignee

Semiconductor Manufacturing International Corp. · CN

Inventors

Tzu-Yin Chiu · Marlboro, US
JUILIN LU · Shanghai, CN
Jianxiang Cai · Shanghai, CN

Key dates

Filing date	May 9, 2013
Grant date	Jun 14, 2016
Priority date	—
Expiry date	May 9, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH10D89/10
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Various embodiments provide semiconductor structures and their fabrication methods. An SRAM memory cell can include at least one semiconductor structure, and an SRAM memory can include at least one SRAM memory cell. An exemplary semiconductor structure can include at least two adjacent transistors formed on a semiconductor substrate. An opening can be formed and surrounded by gates of the two adjacent transistors and a doped region formed between the gates of the two adjacent transistors. A conductive layer can be formed to at least partially cover a bottom and a sidewall of the opening to electrically connect a gate of one transistor with the doped region of the other transistor of the two adjacent transistors.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.