Power semiconductor device having low on-state resistance
US9368621B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2014 |
| Grant date | Jun 14, 2016 |
| Priority date | — |
| Expiry date | Nov 26, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/111
Abstract
A power semiconductor device having low on-state resistance includes a substrate having an epitaxial layer formed thereon, a gate structure, a termination structure, and a patterned conductive layer. The epitaxial layer has at least a first trench and a second trench. The gate structure is embedded in the first trench, including a gate electrode and a shielding electrode disposed under the gate electrode. The termination structure is embedded in the second trench, including a termination electrode. The patterned conductive layer is disposed above the epitaxial layer. Specially, the shield electrode of the gate structure and the termination electrode of the termination structure are configured to receive the gate voltage. The patterned conductive layer is configured to electrically contact said gate electrode and termination electrodes by a first contact plug and a second contact plug respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.