Patent · US Active

ESD protection

US9368963B2 · kind B2 · utility

1Cited by

3References

11Claims

0Family size

Assignee

NXP B.V. · NL

Inventors

Klaus Reimann · Eindhoven, NL
Hans-Martin Ritter · Nahe, DE
Wolfgang Schnitt · Hamburg, DE
Anco Heringa · Eindhoven, NL

Key dates

Filing date	Nov 5, 2013
Grant date	Jun 14, 2016
Priority date	—
Expiry date	Mar 21, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH10D89/611
WIPO fieldElectrical machinery, apparatus, energy
WIPO sectorElectrical engineering

Abstract

An ESD protection circuit comprises a series connection of at least two protection components between a signal line to be protected and a return line (e.g. ground), comprising a first protection component connected to the signal line and a second protection component connected to the ground line. They are connected with opposite polarity so that when one conducts in forward direction the other conducts in reverse breakdown mode. A bias voltage source connects to the junction between the two protection components through a bias impedance. The use of the bias voltage enables the signal distortions resulting from the ESD protection circuit to be reduced.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.