Semiconductor device design system and method
US9372954B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2014 |
| Grant date | Jun 21, 2016 |
| Priority date | — |
| Expiry date | May 15, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method of designing a semiconductor device comprising loading a design rule manual (DRM) and a design rule check (DRC) into an electronic design tool, wherein the DRM comprises one or more design rules and the DRC comprises one or more design rule checks. Each design rule check is both associated with a corresponding design rule and configured to verify compliance with the corresponding design rule. The method further includes receiving a relevant information, wherein the relevant information comprises a layer number or a selected feature of the semiconductor device, creating, by a processor, a condensed DRM from the DRM, a condensed DRC from the DRC and displaying at least the condensed DRM or condensed DRC by a user interface. The condensed DRM is a portion of the DRM and the condensed DRC is a portion of the DRC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.