System, method, and computer program product for low latency scheduling and launch of memory defined tasks
US9378139B2 · kind B2 · utility
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Key dates
| Filing date | May 8, 2013 |
| Grant date | Jun 28, 2016 |
| Priority date | — |
| Expiry date | Feb 28, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4843
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system, method, and computer program product for low-latency scheduling and launch of memory defined tasks. The method includes the steps of receiving a task metadata data structure to be stored in a memory associated with a processor, transmitting the task metadata data structure to a scheduling unit of the processor, storing the task metadata data structure in a cache unit included in the scheduling unit, and copying the task metadata data structure from the cache unit to the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.