Static random-access memory (SRAM) array

US9379014B1 · kind B1 · utility

Assignee

• QUALCOMM Incorporated · US

Inventors

• Niladri Narayan Mojumder · San Diego, US
• Stanley Seungchul Song · San Diego, US
• Choh Fei Yeap · San Diego, US
• Mosaddiq Saifuddin · San Diego, US

Key dates

• Filing date: Jul 18, 2015
• Grant date: Jun 28, 2016
• Expiry date: Jul 18, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B10/12

Abstract

A static random-access memory (SRAM) array includes a first metal layer and a second metal layer. The metal layer includes multiple first source lines spanning multiple columns of cells. The multiple first source lines include a first source line and a second source line. The second metal layer includes multiple second source lines spanning multiple rows of cells. The SRAM array further includes a set of vias coupled to the multiple first source lines and to the multiple second source lines. A first via of the set of vias is coupled to the first source line and multiple vias of the set of vias are coupled to the second source line. Two vias of the multiple vias that are closest to the first via are each substantially the same distance from the first via.