Circuitry and methods for common-mode rejection calibration
US9379676B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2014 |
| Grant date | Jun 28, 2016 |
| Priority date | — |
| Expiry date | May 1, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45616
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Circuitry and methods are disclosed that may employ common mode calibration circuitry configured to at least partially calibrate out impedance differences or mismatches between the differential signal paths of differential signal circuitry. The common mode calibration circuitry may be integrated as an internal part of integrated differential signal circuitry that includes a differential amplifier to reject common mode noise, and may be used to reduce or substantially eliminate any external and/or internal difference in signal path resistance that exists between the differential signal paths of the integrated differential signal circuitry. A common mode calibration signal may be internally or externally applied to the signal inputs of differential signal circuitry, and used to determine a setting for the common mode calibration circuitry that at least partially calibrates out impedance differences or mismatches between the differential signal paths of differential signal circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.