Method for performing data sampling control in an electronic device, and associated apparatus
US9379921B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2015 |
| Grant date | Jun 28, 2016 |
| Priority date | — |
| Expiry date | Jun 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0025
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method for performing data sampling control in an electronic device and an associated apparatus are provided, where the method includes the steps of: detecting whether a data pattern of a received signal of a decision feedback equalizer (DFE) receiver in the electronic device matches a predetermined data pattern, to selectively trigger a data sampling time shift configuration of the DFE receiver; and when the data sampling time shift configuration is triggered, utilizing a phase shift clock, rather than a normal clock corresponding to a normal configuration of the DFE receiver, as an edge sampler clock of an edge sampler in the DFE receiver, to lock onto edge timing of the received signal, and controlling the phase shift clock and the normal clock to have different phases, respectively, to shift data sampling time of the DFE receiver, for performing data sampling in the DFE receiver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.