Critical capacitor built in test
US9383400B2 · kind B2 · utility
0Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2012 |
| Grant date | Jul 5, 2016 |
| Priority date | — |
| Expiry date | Mar 26, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/50
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An electronic circuit and method for carrying out built in test of a capacitor connected to, and arranged to suppress noise at, an input of an electrical circuit is disclosed. The electronic circuit causes current pulses at the input, and monitors the voltage at the input by comparing the voltage at the input with high and/or low reference voltages, outputting a fault signal if the voltage at the input is greater than a high reference voltage or lower than a low reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.