System and method for optical input/output arrays
US9383516B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 2, 2014 |
| Grant date | Jul 5, 2016 |
| Priority date | — |
| Expiry date | Sep 2, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/62
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
System and method embodiments are provided for high density on-chip optical input/output (I/O) arrays with partition waveguide routing topology. System and apparatus embodiments for on-chip optical I/O arrays provide for doubling the density of optical I/O arrays in a given footprint on a photonic integrated circuit (PIC) chip. System and apparatus embodiments for on-chip optical I/O arrays also provide waveguide routing topology to provide signal feedback to facility automated active alignment and coupling of optical fiber arrays in to surface grating coupler elements without use of waveguide crossings and without intersecting with waveguides connecting devices to I/O ports. In an embodiment, a PIC chip includes a plurality of first optical I/O elements and a plurality of second optical I/O elements, wherein a row of I/O elements comprises alternating ones of the first optical I/O elements and the second optical I/O elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.