Non-linear termination for an on-package input/output architecture
US9384163B2 · kind B2 · utility
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3References
15Claims
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Inventors
Key dates
| Filing date | Dec 22, 2011 |
| Grant date | Jul 5, 2016 |
| Priority date | — |
| Expiry date | Feb 20, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An on-package interface. A first set of single-ended transmitter circuits on a first die. A first set of single-ended receiver circuits on a second die. The receiver circuits have a termination circuit comprising an inverter and a resistive feedback element. A plurality of conductive lines couple the first set of transmitter circuits and the first set of receiver circuits. The lengths of the plurality of conductive lines arc matched.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.