Device display
US9384687B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2013 |
| Grant date | Jul 5, 2016 |
| Priority date | — |
| Expiry date | Mar 3, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2300/0809
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a display device and, more particularly, to a display device configured to minimize short circuit of power lines by minimizing overlap between the power lines. A display device according to an aspect of the present invention includes: a first substrate on which data lines, scan lines intersecting the data lines, first to p-th (p being a natural number greater than 1) power lines through which first to p-th source voltages are supplied, and pixels arranged in a matrix form are formed; and a second substrate on which first to p-th auxiliary electrodes are formed, wherein the first to p-th power lines are respectively connected to the first to p-th auxiliary electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.