Semiconductor packages having trench-shaped opening and methods for fabricating the same
US9385109B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 3, 2014 |
| Grant date | Jul 5, 2016 |
| Priority date | — |
| Expiry date | Nov 3, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are semiconductor packages and methods of fabricating the same. In one embodiment, the package may include an upper package stacked on a lower package, and a plurality of connection terminals electrically connecting the lower and upper packages. The lower package may include a lower package substrate, a lower semiconductor chip mounted on the lower package substrate, and a lower mold layer provided on the lower package substrate to mold the lower semiconductor chip. The lower mold layer may have a trench-shaped first opening through which the lower package substrate is exposed in a substantially line shape. The connection terminals may be electrically connected to the lower package substrate exposed by the first opening and be not in contact with the lower mold layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.