Method of forming an integrated multichannel device and single channel device structure
US9385224B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2014 |
| Grant date | Jul 5, 2016 |
| Priority date | — |
| Expiry date | Aug 13, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0123
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit is disclosed that includes a single channel device having a first portion of a single shared heterostructure overlying a substrate structure in a single channel device area, and a gate contact that is in contact with the first portion of the single shared heterostructure. The integrated circuit also includes a multichannel device comprising a second portion of the single shared heterostructure overlying the substrate structure in a multichannel device area, a barrier layer overlying the second portion of the single shared heterostructure, and a superlattice structure overlying the barrier layer, the superlattice structure comprising a plurality of heterostructures. An isolation region in the single shared heterostructure electrical isolates the single channel device from the multichannel device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.