High signal to noise ratio capacitive sensing analog front-end
US9389256B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 18, 2012 |
| Grant date | Jul 12, 2016 |
| Priority date | — |
| Expiry date | Mar 3, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0443
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Capacitance sensing circuits and methods are provided. The capacitance sensing circuit includes a capacitance-to-voltage converter configured to receive a signal from a capacitance to be sensed and to provide an output signal representative of the capacitance, an output chopper configured to convert the output signal of the capacitance-to-voltage converter to a sensed voltage representative of the capacitance to be sensed, an analog accumulator configured to accumulate sensed voltages during an accumulation period of NA sensing cycles and to provide an accumulated analog value, an amplifier configured to amplify the accumulated analog value, and an analog-to-digital converter configured to convert the amplified accumulated analog value to a digital value representative of the capacitance to be sensed. The analog accumulator may include a low pass filter having a frequency response to filter wideband noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.