Semiconductor device
US9391136B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2015 |
| Grant date | Jul 12, 2016 |
| Priority date | — |
| Expiry date | Jun 23, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
Abstract
A semiconductor device includes an n-type semiconductor substrate, which has a main surface having an element region and an outer peripheral region surrounding the element region; a p-type guard ring, which includes: a lowly-doped p-type region disposed on an upper surface of the semiconductor substrate in the outer peripheral region surrounding the element region; and a highly-doped p-type region disposed on an inner side of the lowly-doped p-type region and having an impurity concentration higher than an impurity concentration of the lowly-doped p-type region, wherein a side surface and a bottom surface of the highly-doped p-type region are covered by the lowly-doped p-type region such that the highly-doped p-type region is not in contact with the n-type region; and an ohmic junction electrode, which forms an ohmic junction with the highly-doped p-type region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.