Thin film transistor and manufacturing method thereof and display comprising the same
US9391169B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2014 |
| Grant date | Jul 12, 2016 |
| Priority date | — |
| Expiry date | Jul 12, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6746
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a TFT with an improved gate insulator, having an insulator substrate, a gate layer, a gate insulator layer, a active semiconductor layer, and a source and drain electrode layer, wherein the gate insulator layer includes a first silicon nitride film, a second silicon nitride film disposed on the first silicon nitride film and a third silicon nitride film disposed on the second silicon nitride, and compared to the second silicon nitride film, each of the first silicon nitride film and the third silicon nitride film is much thinner and has a lower content of N—H bond. Also provided is a display including said TFTs. According to the present disclosure, an improved gate insulator layer capable of withstanding higher voltage can be achieved due to the laminated structure and accordingly a TFT with excellent reliability can be formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.