Express virtual channels in an on-chip interconnection network
US9391913B2 · kind B2 · utility
0Cited by
8References
21Claims
0Family size
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Key dates
| Filing date | Jul 17, 2012 |
| Grant date | Jul 12, 2016 |
| Priority date | — |
| Expiry date | Oct 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/101
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method, router node, and set of instructions for using express virtual channels in a component network on a chip are disclosed. An input link 302 may receive an express flow control unit from a source node 102 in a packet-switched network via an express virtual channel 110. An output link 306 may send the express flow control unit to a sink node 106. A switch allocator 322 may forward the express flow control unit directly to the output link 306.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.