Method for producing a dielectric layer on a component
US9394163B2 · kind B2 · utility
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25References
13Claims
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Key dates
| Filing date | Apr 13, 2011 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Nov 15, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H9/02834
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for producing a dielectric layer on the surface of a component is described. In particular embodiments, a dielectric layer having a planar surface can be generated over a substrate topography having raised structures. In a trimming process, a component property, which depends on the thickness or the third topography of the dielectric layer, is adjusted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.