Patent · US Active

Memory efficient thread-level speculation

US9396044B2 · kind B2 · utility

0Cited by
5References
18Claims
0Family size

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Inventors

Key dates

Filing dateApr 25, 2014
Grant dateJul 19, 2016
Priority date
Expiry dateJul 30, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2201/815
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A processor device executes program code in one or more threads. The processor device detects a call of a function in one of the threads and executes the function in a further thread. Further, the processor device performs a selection between saving a state of the processor device when starting execution of the function in the further thread and not saving the state of the processor device when starting execution of the function in the further thread. In response to a conflict related to the execution of the function in the further thread, the processor device may perform a rollback to a last saved state of the processor device and execute the function in the thread in which it was called.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.