Gate driving circuit, TFT array substrate, and display device
US9396682B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 11, 2014 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Sep 20, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driving circuit is disclosed. The gate driving circuit includes m stages of shift registers, where each stage of shift register includes a first reset terminal, a first input terminal, and an output terminal. A first input terminal of the first stage of shift register is configured to receive an initial signal, and a first reset terminal of the first stage of shift register is configured to receive a reset signal. In addition, first reset terminals of the second to i-th stages of shift registers are configured to receive first signals, where a first reset terminal of each stage of shift register is electrically connected to an output terminal of the previous stage of shift register to receive an output signal from the previous stage of shift register, such that the output signal from the previous stage of shift register causes the next stage of shift register to reset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.