Method of controlling an etching process for forming fine patterns of a semiconductor device
US9397013B2 · kind B2 · utility
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10References
15Claims
0Family size
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Key dates
| Filing date | Sep 15, 2015 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Sep 15, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of controlling an etching process for forming fine patterns of a semiconductor device includes forming a lower pattern having a plurality of openings on a substrate, obtaining a width value of the lower pattern, and controlling a process recipe of an etching process for forming the lower pattern by using the width value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.