Patent · US Active

FinFET-based ESD devices and methods for forming the same

US9397098B2 · kind B2 · utility

10Cited by
1References
20Claims
0Family size

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Key dates

Filing dateNov 26, 2014
Grant dateJul 19, 2016
Priority date
Expiry dateNov 26, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D89/813

Abstract

A semiconductor device includes semiconductor fins on semiconductor strips on a substrate. The semiconductor fins are parallel to each other. A gate stack is over the semiconductor fins, and a drain epitaxy semiconductor region is disposed laterally from a side of the gate stack and on the semiconductor strips. A first dielectric layer is over the substrate, and the first dielectric layer has a first metal layer. A second dielectric layer is over the first dielectric layer, and the second dielectric layer has a second metal layer. Vias extend from the second metal layer and through the first dielectric layer, and the vias are electrically coupled to the drain epitaxy semiconductor region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.