Circuit for common mode removal for DC-coupled front-end circuits
US9397645B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2014 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Aug 7, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/007
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one example, a method includes receiving a first differential signal including a first voltage signal and a second voltage signal, wherein the first differential signal includes a first common mode voltage; receiving a second common mode voltage. The method further includes determining, by a circuit, a second differential signal including a third voltage signal and a fourth voltage signal, wherein a difference between the third voltage signal and the fourth voltage signal is based on a difference between the first voltage signal and the second voltage signal, wherein the second differential signal includes the second common mode voltage. The method further includes outputting, substantially continuously, the second differential signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.