Multi-phase gate driver and display panel using the same
US9401220B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2014 |
| Grant date | Jul 26, 2016 |
| Priority date | — |
| Expiry date | Apr 17, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multi-phase gate driver includes a start/end signal generator circuit and X shift register modules. The start/end signal generator circuit is configured to sequentially output N start signals and N end signals according to a first control signal, a second control signal and N groups of clock signals. Each start and end signals have a delay relative to the previous one. Each group of clock signals includes a first clock signal and a second clock signal, which are inverted to each other. The X shift register modules are electrically coupled to the start/end signal generator circuit and each includes N shift register units. The Mth shift register unit of the first shift register module outputs a gate signal according to the Mth group of clock signals, the Mth start signal, and the gate signal outputted from the Mth shift register unit in the second shift register module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.