Patent · US Active

Method and apparatus to minimize switching noise disturbance

US9405308B2 · kind B2 · utility

1Cited by
5References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 19, 2014
Grant dateAug 2, 2016
Priority date
Expiry dateSep 28, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K17/163
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

A power management circuit generates a reference voltage and distributes it to a plurality of independently-enabled regulator voltage reference circuits. Separate enable signals and enable pre-charge signals are distributed to each regulator voltage reference circuit. As a regulator voltage reference circuit is enabled via its associated enable signal, an enable pre-charge signal is also asserted for an initial duration. Each regulator voltage reference circuit includes a voltage setting circuit and a first current limiting transistor in series and operative to interrupt current to the voltage setting circuit when the regulator voltage reference circuit is disabled. A second current limiting transistor is configured as a current mirror with the first current limiting transistor, and a pre-charge bias current from a current source passes through the second transistor. This limits the current through the first transistor and into the voltage setting circuit for the initial duration.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.