Method and system for register clearing in data flow analysis in decompilation
US9405519B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 23, 2012 |
| Grant date | Aug 2, 2016 |
| Priority date | — |
| Expiry date | Jul 3, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/44
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and a system for register clearing in data flow analysis in decompilation are provided. The method includes: reading all function statements in a code file; sequentially judging each of the read function statements, and creating a binary tree and inputting the function statement into the binary tree in a case that the function statement includes a register name; sequentially judging each of the function statements including the register name, and performing an elimination process on the created binary tree to remove the register name from the binary tree in a case that the function statement includes a right child end tag of the binary tree, to generate a simplest binary tree; and generating a function statement in high-level language based on the simplest binary tree. All function statements can be read at a time and multiple reading and writing are avoided in the invention. In addition, a binary tree is created based on the read function statement and an elimination process is performed on the binary tree, so the function statement not including the register name can be obtained conveniently and quickly, which improves the execution efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.