Patent · US Active

Methods and apparatus for virtualization in an integrated circuit

US9405700B2 · kind B2 · utility

16Cited by
12References
24Claims
0Family size

Assignee

Inventor

Key dates

Filing dateNov 3, 2011
Grant dateAug 2, 2016
Priority date
Expiry dateMar 5, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/684
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Various methods and apparatus are described for communicating transactions between one or more initiator IP cores and one or more target IP cores coupled to an interconnect. A centralized Memory Management logic Unit (MMU) is located in the interconnect for virtualization and sharing of integrated circuit resources including target cores between the one or more initiator IP cores. A master translation look aside buffer (TLB) stores virtualization and sharing information in the entries of the master TLB. A set of two or more translation look aside buffers (TLBs) locally store virtualization and sharing information replicated from the master TLB. Logic in the MMU or other software updates the virtualization and sharing information replicated from the master TLB in the entries of one or more of the set of local TLBs.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.