Commonality of memory island interface and structure
US9405713B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 2012 |
| Grant date | Aug 2, 2016 |
| Priority date | — |
| Expiry date | May 3, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/385
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The functional circuitry of a network flow processor is partitioned into a number of rectangular islands. The islands are disposed in rows. A configurable mesh data bus extends through the islands. A first island includes a first memory and a first data bus interface. A second island includes a processor, a second memory, and a second data bus interface. The processor can issue a command for a target memory to do an action. If a field in the command has a first value then the target memory is the first memory, whereas if the field has a second value then the target memory is in the second memory. The command format is the same, regardless of whether the target memory is local or remote. If the target memory is remote, then a data bus bridge adds destination information before putting the command onto the global configurable mesh data bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.