Method of manufacturing super junction for semiconductor device
US9406745B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2015 |
| Grant date | Aug 2, 2016 |
| Priority date | — |
| Expiry date | Jul 23, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/157
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing super junction for semiconductor device is disclosed. The super junction for semiconductor device includes a silicon substrate with a first conductive type epitaxial layer, a plurality of highly-doped second conductive type columns formed in the first conductive type epitaxial layer, and a plurality of lightly-doped (first conductive type or second conductive type) side walls formed on outer surfaces of the highly-doped second conductive type. The semiconductor device is super-junction MOSFET, super junction MOSFET, super junction Schottky rectifier, super junction IGBT, thyristor or super junction diode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.