Patent · US Active

System for digitally controlled edge interpolator linearization

US9407245B2 · kind B2 · utility

3Cited by

2References

19Claims

0Family size

Assignee

Intel IP Corporation · US

Inventors

Sebastian Sievert · Munich, DE
Assaf Ben-Bassat · Haifa, IL
Ofir Degani · Haifa, IL
Rotem Banin · Even Yehuda, IL

Key dates

Filing date	Jun 30, 2014
Grant date	Aug 2, 2016
Priority date	—
Expiry date	Aug 13, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/0814
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

This application discusses, among other things, an interpolator architecture for digital-to-time converters (DTCs). In an example, an interpolator can include interpolation cells and retention cells configured provide an interpolated output based on at least two offset clock signals. In certain examples, an example interpolator can provide contention free control of the interpolator output with improved noise immunity.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.