Patent · US Active

Using SerDes loopbacks for low latency functional modes with full monitoring capability

US9407574B2 · kind B2 · utility

1Cited by

5References

17Claims

0Family size

Assignee

ADVA Optical Networking SE · DE

Inventors

Marshall Johnson · Alpharetta, US
David Dworkin · Alpharetta, US
Robert H. Bishop · Cumming, US

Key dates

Filing date	Apr 17, 2014
Grant date	Aug 2, 2016
Priority date	—
Expiry date	Apr 17, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH04Q11/0071
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

An apparatus comprising high speed ports connected via an integrated high speed serial switch fabric and serializer/deserializer circuits to an internal processing logic, wherein the high speed serial switch fabric is adapted to switch a serial reception signal received by a high speed port to at least one of at least one other high speed port of the apparatus and to the serializer/deserializer circuit of the receiving high speed port.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.