Load-balanced sparse array processing
US9411657B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2012 |
| Grant date | Aug 9, 2016 |
| Priority date | — |
| Expiry date | Feb 15, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/5061
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sparse array is partitioned into first partitions and a second array is partitioned into second partitions based on an invariant relationship between the sparse array and the second array. The sparse array and the second array are associated with a computation involving the sparse array and the second array. The first partitions and the corresponding second partitions are distributed to workers. A different first partition and corresponding second partition is distributed to each of the workers. Third partitions of the sparse array and corresponding fourth partitions of the second array are determined based on the invariant relationship and measurements of load are received from each of the workers. At least one of the first partitions and the corresponding second partition is different from one of the third partitions and the corresponding fourth partition. The at least one of the first partitions and the corresponding second partition that is different is redistributed among the workers. A different third partition and corresponding fourth partition is executed by each of the workers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.