Memory system including nonvolatile and volatile memory and operating method thereof
US9411719B2 · kind B2 · utility
7Cited by
4References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 1, 2013 |
| Grant date | Aug 9, 2016 |
| Priority date | — |
| Expiry date | Feb 3, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/214
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system having multiple memory layers includes a first memory layer comprising a volatile memory, a second memory layer comprising a first sub-memory and a second sub-memory. In response to a reference failure that occurred in the first memory layer, to which a read reference failed data and a write reference failed data are respectively loaded from a lower level memory layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.