CDR circuit and semiconductor device
US9413517B2 · kind B2 · utility
3Cited by
4References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2015 |
| Grant date | Aug 9, 2016 |
| Priority date | — |
| Expiry date | Jul 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock data recovery (CDR) circuit is provided with a circuit that updates a locked oscillation frequency, with a small loop gain, after phase lock based on a phase-locked loop circuit for a frequency-locked frequency is completed by a frequency-locked loop circuit or during a phase lock operation. Since the locked oscillation frequency is updated with a small loop gain, it is possible to correct a fluctuation in a frequency of an oscillation circuit in the frequency-locked loop circuit without oscillating a phase-locked loop undesirably even during a phase lock operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.