TFT array substrate structure
US9417497B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2014 |
| Grant date | Aug 16, 2016 |
| Priority date | — |
| Expiry date | Mar 14, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/56
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention provides a TFT array substrate structure, which includes first and second gates (11, 13), a semiconductor layer (20), first and second sources (31, 33), and first and second drains (42, 44). The first gate (11) and the first drain (42) are arranged to overlap in space so as to form a first overlapping zone (D). The second gate (13) and the second drain (44) are arranged to overlap in space so as to form a second overlapping zone (E). The first gate (11) has a first edge (113) corresponding to the first overlapping zone (D). The second gate (13) has a second edge (133) corresponding to the second overlapping zone (E). The first edge (113) and the first drain (42) intersect in space in an inclined manner. The second edge (133) and the second drain (44) intersect in space in an inclined manner. When the first and second drains (42, 44) are moved relative to the first and second gates (11, 13), areas of the first overlapping zone (D) and the second overlapping zone (E) undergo identical change.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.