Shift register and flat panel display device including the same
US9418755B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2013 |
| Grant date | Aug 16, 2016 |
| Priority date | — |
| Expiry date | Nov 13, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/3677
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are a shift register and a flat panel display device. The shift register includes a plurality of stages that supply a gate-on voltage pulse to a plurality of gate lines formed in a display panel. Each of the stages includes a pull-up transistor configured to supply one of a plurality of clock signals to an output node according to a voltage of a first node, a pull-down transistor configured to supply a gate-off voltage to the output node according to a voltage of a second node, a node controller configured to control the voltages of the first and second nodes on the basis of a gate start signal, and a switching unit connected to at least two gate lines adjacent to the output node, and configured to sequentially supply gate-on voltage pulses having different pulse widths to the at least two adjacent gate lines using the clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.