Power-efficient chopping scheme for offset error correction in MEMS gyroscopes

US9419597B1 · kind B1 · utility

Assignee

• Analog Devices Global Unlimited Company · BM

Inventors

• Achal Venkatesh · Kanchinakote, IN
• Abhinav Kumar Dikshit · Varanasi, IN

Key dates

• Filing date: Jun 15, 2015
• Grant date: Aug 16, 2016
• Expiry date: Jun 15, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K5/24
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

Embodiments of the present invention eliminate the high bandwidth buffer from the analog chopper circuit. In some specific embodiments, the buffer is replace with a comparator-based loop that can be used to apply offset correction and achieve N-bit settling performance with sharp (up to 1 ns) rise and fall time with significantly lower power than with a buffer. Other specific embodiments include overcharging circuitry in combination with the comparator-based loop or in lieu of the comparator-based loop. Still other specific embodiments include an array of capacitors in place of the single large capacitor Clarge and use decoding/switching circuitry to selectively couple one of the capacitors into the circuit based on the DAC input code. Importantly, exemplary embodiments result in total power dissipation around the theoretical limit needed to charge the capacitor to the DAC output voltage.