System and method for optimizing software transactional memory operations using static caching of memory objects
US9424015B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2011 |
| Grant date | Aug 23, 2016 |
| Priority date | — |
| Expiry date | Oct 12, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/4442
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for optimizing transactional memory operations may employ static analysis of source code and static caching of memory objects to elide redundant transactional accesses. For example, a compiler (or an optimizer thereof) may be configured to analyze code that includes an atomic transaction to determine if any read accesses to shared memory locations are dominated by a previous read or write access to the same locations and/or any write accesses to shared memory locations are post-dominated by a subsequent write access to the same locations. Any access within a transaction that is determined to be redundant (e.g., any access other than the first read of a given shared memory location from within the transaction or the last write to a given shared memory location from within the transaction) may be replaced (by the compiler/optimizer) with a non-transactional access to a cached shadow copy of the shared memory location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.