Multi-level deficit weighted round robin scheduler acting as a flat single scheduler
US9424088B1 · kind B1 · utility
1Cited by
1References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2012 |
| Grant date | Aug 23, 2016 |
| Priority date | — |
| Expiry date | Aug 9, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/90
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the present disclosure provide techniques and mechanisms for providing a fast multi-level scheduler, implemented using a plurality of smaller schedulers, the plurality of smaller schedulers together performing the functions of a single conventional scheduler.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.