Test method and test device for line defect of display panel
US9424792B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 17, 2013 |
| Grant date | Aug 23, 2016 |
| Priority date | — |
| Expiry date | Feb 9, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0202
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A test method for line defect in a display panel (10) comprises: inputting a first ON signal and a first OFF signal into odd rows of gate scanning lines (GE12) and even rows of gate scanning lines (GS13) of the display panel (10) respectively, to turn on transistors controlled by the odd rows of gate scanning lines (GE12), and turn off transistors controlled by the even rows of gate scanning lines (GS13), thereby obtaining a first test image; inputting a second OFF signal and a second ON signal into the odd rows of gate scanning lines (GE12) and even rows of gate scanning lines (GS13) of the display panel (10) respectively, to turn off the transistors controlled by the odd rows of gate scanning lines (GE12), and turn on the transistors controlled by the even rows of gate scanning lines (GE13), thereby obtaining a second test image; comparing the first test image with the second test image to determine that line display defect appearing in the first test image or the second test image are true display defect. Also is disclosed a test device for line defect in a display panel (10). This method allows the test result to approach the lighting test result under module signal input state…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.