Semiconductor storage device
US9424923B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2011 |
| Grant date | Aug 23, 2016 |
| Priority date | — |
| Expiry date | Dec 17, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor storage device with a novel structure, which can retain stored data even when power is not supplied (i.e., is non-volatile) and has no limitation on the number of write cycles. The semiconductor storage device includes a memory cell array in which a plurality of memory cells are arranged in matrix, a decoder configured to select a memory cell to operate among the plurality of memory cells in accordance with a control signal, and a control circuit configured to select whether to output the control signal to the decoder. In each of the plurality of memory cells, data is held by turning off a selection transistor whose channel region is formed with an oxide semiconductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.