Methods of forming a pattern and methods of manufacturing a semiconductor device using the same
US9425059B2 · kind B2 · utility
0Cited by
6References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2013 |
| Grant date | Aug 23, 2016 |
| Priority date | — |
| Expiry date | Aug 9, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a pattern includes forming an underlayer on an etching target layer by a chemical vapor deposition (CVD) process, the underlayer including a silicon compound combined with a photoacid generator (PAG), forming a photoresist layer on the underlayer, irradiating extreme ultraviolet (EUV) light on the photoresist layer to form a photoresist pattern, and etching the etching target layer using the photoresist pattern as an etching mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.