Coincident site lattice-matched growth of semiconductors on substrates using compliant buffer layers
US9425249B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 1, 2010 |
| Grant date | Aug 23, 2016 |
| Priority date | — |
| Expiry date | Apr 18, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/548
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a silicon substrate using a compliant buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The compliant buffer material and semiconductor materials may be deposited using coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The coincident site lattice matching epitaxial process, as well as the use of a ductile buffer material, reduce the internal stresses and associated crystal defects within the deposited semiconductor materials fabricated using the disclosed method. As a result, the semiconductor devices provided herein possess enhanced performance characteristics due to a relatively low density of crystal defects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.