System and method for providing stealth memory
US9430402B2 · kind B2 · utility
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6References
20Claims
0Family size
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Key dates
| Filing date | Nov 4, 2014 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Dec 30, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The described implementations relate to computer memory. One implementation provides a technique that can include providing stealth memory to an application. The stealth memory can have an associated physical address on a memory device. The technique can also include identifying a cache line of a cache that is mapped to the physical address associated with the stealth page, and locking one or more other physical addresses on the memory device that also map to the cache line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.