Patent · US Active

Memory protection

US9430409B2 · kind B2 · utility

7Cited by

14References

9Claims

0Family size

Assignee

Nordic Semiconductor ASA · NO

Inventors

Frank Berntsen · Trondheim, NO
Ola Marvik · Trondheim, NO

Key dates

Filing date	Jun 21, 2013
Grant date	Aug 30, 2016
Priority date	—
Expiry date	Jun 6, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG06F12/1483
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated-circuit device (1) comprises a processor (7), memory (13) for storing executable code, and memory protection logic (9). The memory protection logic (9) is configured to: determine the state of a read protection flag for a protected region of the memory (13); detect a memory read request by the processor (7); determine whether the read request is for an address in the protected region of the memory (13); determine whether the processor (7) issued the read request while executing code stored in the protected region of the memory (13); and deny read requests for addresses in the protected region if the read protection flag for the protected region is set, unless at least one of one or more access conditions is met, wherein one of the access conditions is that the processor (7) issued the read requests while executing code stored in the protected region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.