Bit-line sense amplifier capable of compensating mismatch between transistors, and semiconductor memory device including the same
US9431071B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2015 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Mar 16, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bit-line sense amplifier may include a pull-up driving circuit, a pull-down driving circuit and a latch-type sense amplifier. The pull-up driving circuit including a plurality of PMOS transistors connected between a power supply voltage line and a first driving power supply line, and may be configured to provide a first driving current on the first driving power supply line in response to an up control signal. The pull-down driving circuit may be configured to provide a second driving current on a second driving power supply line in response to a down control signal. The latch-type sense amplifier may be connected between the first driving power supply line and the second driving power supply line, and may be configured to sense and amplify a voltage difference between a bit line and a complementary bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.