Determining and storing bit error rate relationships in spin transfer torque magnetoresistive random-access memory (STT-MRAM)
US9431084B2 · kind B2 · utility
33Cited by
7References
15Claims
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Key dates
| Filing date | Jun 30, 2014 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Jun 30, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1693
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods to manage memory on a spin transfer torque magnetoresistive random-access memory (STT-MRAM) are provided. A particular method may include determining a performance characteristic using relationship information that relates a bit error rate to at least one of a programming pulse width, a temperature, a history-based predictive performance parameter, a coding scheme, and a voltage level also associated with a memory. The performance characteristic is stored and used to manage a write operation associated with the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.